VLSI Design Quetion Bank 2016

1 Feb 2016    09:09 pm

                                                                                              VLSI DESIGN(A60432)
QUESTION BANK
UNIT-I
Part –A :
⦁    State Moore’s first Law.
⦁    Define Latch-up in CMOS.
⦁    Explain about fabrication of nMOS.
⦁    Distinguish CMOS and Bipolar  transistor
⦁    Discuss about  pass transistor
Part-B :
1.Write short notes on,
a) MOS transistor Figure of merit W0
b) Explain about nMOS inveter.

2.a)Explain about Resistor pull-up
   b)Explain N-well process
3.a)Derive Zpull.up/Zpull.down ratio of nMOS inverter driven by another nMOS inverter
   b)Describe diffusion process

4.a) Explain about BiCMOS inveter
   b) Define threshold voltage Vt of MOS transistor

5.a)Derive the Ids-Vds relationships
  b) Define transistor transconductance gm

6.a)Explain about CMOS inveter
   b) Explain about BiCMOS fabrication process

 

         

UNIT-II

Part- A :

⦁    State  MOS Layers
⦁    Explain about contact cuts
⦁    Define Stick Diagram
⦁    Explain Lambda based Design rules for transistor
⦁    Explain about VIA.

PART-B
     1.a)Explain Lambda based Design rules for wires CMOS
          b)Explain NMOS design style.
     2. a) Draw the stick diagram for CMOS inverter
          b). Draw the Layout Diagram for NMOS inverter.
     3. a) Explain Lambda based Design rules for NMOS.
        b) Explain CMOS design style
    4. a). Explain about VLSI Design Flow
        b) Draw the Layout diagram for CMOS inverter
    5.Explain following scaling factor
        a)Gate area(Ag).
        b ) Channel Resistance(RON)
        c) Gate delay
   6. Explain following scaling factor
       a)Saturation current(Ids)
      b)Current Density
      c)Gate Capacitance

 

 

 

 

 


UNIT-III

PART-A
1.Define Fan-in & Fan –out Characteristics
2)Explain about switch logic delay
3)Define Fall –time in CMOS

 PART-B

1.a) Define Rise –time in CMOS
   b) Explain about Switch Logic

2.a)Explain about sheet resistance
   b)Explain about Pseudo NMOS logic
 
3.a)Describe standard units of capacitance Cg
   b)State the delay unit